Machine (P#0 Backend=Linux)
  Socket L#0 (P#0)
    L3Cache L#0 (4096KB line=64)
      L2Cache L#0 (1024KB line=64)
        L1Cache L#0 (16KB line=64)
          Core L#0 (P#0)
            PU L#0 (P#0)
        L1Cache L#1 (16KB line=64)
          Core L#1 (P#2)
            PU L#1 (P#8)
      L2Cache L#1 (1024KB line=64)
        L1Cache L#2 (16KB line=64)
          Core L#2 (P#1)
            PU L#2 (P#4)
        L1Cache L#3 (16KB line=64)
          Core L#3 (P#3)
            PU L#3 (P#12)
  Socket L#1 (P#1)
    L3Cache L#1 (4096KB line=64)
      L2Cache L#2 (1024KB line=64)
        L1Cache L#4 (16KB line=64)
          Core L#4 (P#0)
            PU L#4 (P#1)
        L1Cache L#5 (16KB line=64)
          Core L#5 (P#2)
            PU L#5 (P#9)
      L2Cache L#3 (1024KB line=64)
        L1Cache L#6 (16KB line=64)
          Core L#6 (P#1)
            PU L#6 (P#5)
        L1Cache L#7 (16KB line=64)
          Core L#7 (P#3)
            PU L#7 (P#13)
  Socket L#2 (P#2)
    L3Cache L#2 (4096KB line=64)
      L2Cache L#4 (1024KB line=64)
        L1Cache L#8 (16KB line=64)
          Core L#8 (P#0)
            PU L#8 (P#2)
        L1Cache L#9 (16KB line=64)
          Core L#9 (P#2)
            PU L#9 (P#10)
      L2Cache L#5 (1024KB line=64)
        L1Cache L#10 (16KB line=64)
          Core L#10 (P#1)
            PU L#10 (P#6)
        L1Cache L#11 (16KB line=64)
          Core L#11 (P#3)
            PU L#11 (P#14)
  Socket L#3 (P#3)
    L3Cache L#3 (4096KB line=64)
      L2Cache L#6 (1024KB line=64)
        L1Cache L#12 (16KB line=64)
          Core L#12 (P#0)
            PU L#12 (P#3)
        L1Cache L#13 (16KB line=64)
          Core L#13 (P#2)
            PU L#13 (P#11)
      L2Cache L#7 (1024KB line=64)
        L1Cache L#14 (16KB line=64)
          Core L#14 (P#1)
            PU L#14 (P#7)
        L1Cache L#15 (16KB line=64)
          Core L#15 (P#3)
            PU L#15 (P#15)
depth 0:	1 Machine (type #1)
 depth 1:	4 Sockets (type #3)
  depth 2:	4 Caches (type #4)
   depth 3:	8 Caches (type #4)
    depth 4:	16 Caches (type #4)
     depth 5:	16 Cores (type #5)
      depth 6:	16 PUs (type #6)
Topology not from this system
