\hypertarget{group__avr__sfr}{}\doxysubsection{$<$avr/sfr\+\_\+defs.h$>$\+: Special function registers}
\label{group__avr__sfr}\index{$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}}
\doxysubsubsection*{Modules}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{group__avr__sfr__notes}{Additional notes from $<$avr/sfr\+\_\+defs.\+h$>$}}
\end{DoxyCompactItemize}
\doxysubsubsection*{Bit manipulation}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+BV}}(bit)~(1 $<$$<$ (bit))
\item 
\mbox{\Hypertarget{group__avr__sfr_ga9196a6223dfe1c6ee36fbe42a95ceffe}\label{group__avr__sfr_ga9196a6223dfe1c6ee36fbe42a95ceffe}} 
\#define {\bfseries \+\_\+\+V\+E\+C\+T\+OR}(N)~\+\_\+\+\_\+vector\+\_\+ \#\# N
\end{DoxyCompactItemize}
\doxysubsubsection*{IO register bit manipulation}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group__avr__sfr_ga3b034cb1d74b9addc7599bd6ea6bd0d9}{bit\+\_\+is\+\_\+set}}(sfr,  bit)~(\+\_\+\+S\+F\+R\+\_\+\+B\+Y\+TE(sfr) \& \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+BV}}(bit))
\item 
\#define \mbox{\hyperlink{group__avr__sfr_gad188fb0fbfd923bdb01294072367d024}{bit\+\_\+is\+\_\+clear}}(sfr,  bit)~(!(\+\_\+\+S\+F\+R\+\_\+\+B\+Y\+TE(sfr) \& \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+BV}}(bit)))
\item 
\#define \mbox{\hyperlink{group__avr__sfr_gaaf6857fa882da35f8685e2001e5c3bbe}{loop\+\_\+until\+\_\+bit\+\_\+is\+\_\+set}}(sfr,  bit)~do \{ \} while (\mbox{\hyperlink{group__avr__sfr_gad188fb0fbfd923bdb01294072367d024}{bit\+\_\+is\+\_\+clear}}(sfr, bit))
\item 
\#define \mbox{\hyperlink{group__avr__sfr_gabf06c3d703cf5adc691c0be5d72e7839}{loop\+\_\+until\+\_\+bit\+\_\+is\+\_\+clear}}(sfr,  bit)~do \{ \} while (\mbox{\hyperlink{group__avr__sfr_ga3b034cb1d74b9addc7599bd6ea6bd0d9}{bit\+\_\+is\+\_\+set}}(sfr, bit))
\end{DoxyCompactItemize}


\doxysubsubsection{Detailed Description}
When working with microcontrollers, many tasks usually consist of controlling internal peripherals, or external peripherals that are connected to the device. The entire IO address space is made available as {\itshape memory-\/mapped IO}, i.\+e. it can be accessed using all the M\+CU instructions that are applicable to normal data memory. For most A\+VR devices, the IO register space is mapped into the data memory address space with an offset of 0x20 since the bottom of this space is reserved for direct access to the M\+CU registers. (Actual S\+R\+AM is available only behind the IO register area, starting at some specific address depending on the device.) 

For example the user can access memory-\/mapped IO registers as if they were globally defined variables like this\+:


\begin{DoxyCode}{0}
\DoxyCodeLine{PORTA = 0x33;}
\DoxyCodeLine{\textcolor{keywordtype}{unsigned} \textcolor{keywordtype}{char} foo = PINA;}
\end{DoxyCode}


The compiler will choose the correct instruction sequence to generate based on the address of the register being accessed.

The advantage of using the memory-\/mapped registers in C programs is that it makes the programs more portable to other C compilers for the A\+VR platform.

Note that special care must be taken when accessing some of the 16-\/bit timer IO registers where access from both the main program and within an interrupt context can happen. See \mbox{\hyperlink{FAQ_faq_16bitio}{Why do some 16-\/bit timer registers sometimes get trashed?}}.

\begin{DoxyParagraph}{Porting programs that use the deprecated sbi/cbi macros}

\end{DoxyParagraph}
Access to the A\+VR single bit set and clear instructions are provided via the standard C bit manipulation commands. The sbi and cbi macros are no longer directly supported. sbi (sfr,bit) can be replaced by sfr $\vert$= \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+B\+V(bit)}} .

i.\+e.\+: \mbox{\hyperlink{group__deprecated__items_ga014ef751e83f97569c06f3cdd888f3f7}{sbi(\+P\+O\+R\+T\+B, P\+B1)}}; is now P\+O\+R\+TB $\vert$= \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+B\+V(\+P\+B1)}};

This actually is more flexible than having sbi directly, as the optimizer will use a hardware sbi if appropriate, or a read/or/write operation if not appropriate. You do not need to keep track of which registers sbi/cbi will operate on.

Likewise, cbi (sfr,bit) is now sfr \&= $\sim$(\mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+B\+V(bit)}}); 

\doxysubsubsection{Macro Definition Documentation}
\mbox{\Hypertarget{group__avr__sfr_ga11643f271076024c395a93800b3d9546}\label{group__avr__sfr_ga11643f271076024c395a93800b3d9546}} 
\index{$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}!\_BV@{\_BV}}
\index{\_BV@{\_BV}!$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}}
\doxyparagraph{\texorpdfstring{\_BV}{\_BV}}
{\footnotesize\ttfamily \#define \+\_\+\+BV(\begin{DoxyParamCaption}\item[{}]{bit }\end{DoxyParamCaption})~(1 $<$$<$ (bit))}


\begin{DoxyCode}{0}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{io_8h}{avr/io.h}}>}}
\end{DoxyCode}


Converts a bit number into a byte value.

\begin{DoxyNote}{Note}
The bit shift is performed by the compiler which then inserts the result into the code. Thus, there is no run-\/time overhead when using \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+B\+V()}}. 
\end{DoxyNote}
\mbox{\Hypertarget{group__avr__sfr_gad188fb0fbfd923bdb01294072367d024}\label{group__avr__sfr_gad188fb0fbfd923bdb01294072367d024}} 
\index{$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}!bit\_is\_clear@{bit\_is\_clear}}
\index{bit\_is\_clear@{bit\_is\_clear}!$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}}
\doxyparagraph{\texorpdfstring{bit\_is\_clear}{bit\_is\_clear}}
{\footnotesize\ttfamily \#define bit\+\_\+is\+\_\+clear(\begin{DoxyParamCaption}\item[{}]{sfr,  }\item[{}]{bit }\end{DoxyParamCaption})~(!(\+\_\+\+S\+F\+R\+\_\+\+B\+Y\+TE(sfr) \& \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+BV}}(bit)))}


\begin{DoxyCode}{0}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{io_8h}{avr/io.h}}>}}
\end{DoxyCode}


Test whether bit {\ttfamily bit} in IO register {\ttfamily sfr} is clear. This will return non-\/zero if the bit is clear, and a 0 if the bit is set. \mbox{\Hypertarget{group__avr__sfr_ga3b034cb1d74b9addc7599bd6ea6bd0d9}\label{group__avr__sfr_ga3b034cb1d74b9addc7599bd6ea6bd0d9}} 
\index{$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}!bit\_is\_set@{bit\_is\_set}}
\index{bit\_is\_set@{bit\_is\_set}!$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}}
\doxyparagraph{\texorpdfstring{bit\_is\_set}{bit\_is\_set}}
{\footnotesize\ttfamily \#define bit\+\_\+is\+\_\+set(\begin{DoxyParamCaption}\item[{}]{sfr,  }\item[{}]{bit }\end{DoxyParamCaption})~(\+\_\+\+S\+F\+R\+\_\+\+B\+Y\+TE(sfr) \& \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\+\_\+\+BV}}(bit))}


\begin{DoxyCode}{0}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{io_8h}{avr/io.h}}>}}
\end{DoxyCode}


Test whether bit {\ttfamily bit} in IO register {\ttfamily sfr} is set. This will return a 0 if the bit is clear, and non-\/zero if the bit is set. \mbox{\Hypertarget{group__avr__sfr_gabf06c3d703cf5adc691c0be5d72e7839}\label{group__avr__sfr_gabf06c3d703cf5adc691c0be5d72e7839}} 
\index{$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}!loop\_until\_bit\_is\_clear@{loop\_until\_bit\_is\_clear}}
\index{loop\_until\_bit\_is\_clear@{loop\_until\_bit\_is\_clear}!$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}}
\doxyparagraph{\texorpdfstring{loop\_until\_bit\_is\_clear}{loop\_until\_bit\_is\_clear}}
{\footnotesize\ttfamily \#define loop\+\_\+until\+\_\+bit\+\_\+is\+\_\+clear(\begin{DoxyParamCaption}\item[{}]{sfr,  }\item[{}]{bit }\end{DoxyParamCaption})~do \{ \} while (\mbox{\hyperlink{group__avr__sfr_ga3b034cb1d74b9addc7599bd6ea6bd0d9}{bit\+\_\+is\+\_\+set}}(sfr, bit))}


\begin{DoxyCode}{0}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{io_8h}{avr/io.h}}>}}
\end{DoxyCode}


Wait until bit {\ttfamily bit} in IO register {\ttfamily sfr} is clear. \mbox{\Hypertarget{group__avr__sfr_gaaf6857fa882da35f8685e2001e5c3bbe}\label{group__avr__sfr_gaaf6857fa882da35f8685e2001e5c3bbe}} 
\index{$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}!loop\_until\_bit\_is\_set@{loop\_until\_bit\_is\_set}}
\index{loop\_until\_bit\_is\_set@{loop\_until\_bit\_is\_set}!$<$avr/sfr\_defs.h$>$: Special function registers@{$<$avr/sfr\_defs.h$>$: Special function registers}}
\doxyparagraph{\texorpdfstring{loop\_until\_bit\_is\_set}{loop\_until\_bit\_is\_set}}
{\footnotesize\ttfamily \#define loop\+\_\+until\+\_\+bit\+\_\+is\+\_\+set(\begin{DoxyParamCaption}\item[{}]{sfr,  }\item[{}]{bit }\end{DoxyParamCaption})~do \{ \} while (\mbox{\hyperlink{group__avr__sfr_gad188fb0fbfd923bdb01294072367d024}{bit\+\_\+is\+\_\+clear}}(sfr, bit))}


\begin{DoxyCode}{0}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{io_8h}{avr/io.h}}>}}
\end{DoxyCode}


Wait until bit {\ttfamily bit} in IO register {\ttfamily sfr} is set. 