\hypertarget{group__demo__project}{}\doxysubsection{A simple project}
\label{group__demo__project}\index{A simple project@{A simple project}}
At this point, you should have the G\+NU tools configured, built, and installed on your system. In this chapter, we present a simple example of using the G\+NU tools in an A\+VR project. After reading this chapter, you should have a better feel as to how the tools are used and how a {\ttfamily Makefile} can be configured.\hypertarget{group__demo__project_demo_project_desc}{}\doxysubsubsection{The Project}\label{group__demo__project_demo_project_desc}
This project will use the pulse-\/width modulator ({\ttfamily P\+WM}) to ramp an L\+ED on and off every two seconds. An A\+T90\+S2313 processor will be used as the controller. The circuit for this demonstration is shown in the \mbox{\hyperlink{group__demo__project_demo_project_schematic}{schematic diagram}}. If you have a development kit, you should be able to use it, rather than build the circuit, for this project.

\begin{DoxyNote}{Note}
Meanwhile, the A\+T90\+S2313 became obsolete. Either use its successor, the (pin-\/compatible) A\+Ttiny2313 for the project, or perhaps the A\+Tmega8 or one of its successors (A\+Tmega48/88/168) which have become quite popular since the original demo project had been established. For all these more modern devices, it is no longer necessary to use an external crystal for clocking as they ship with the internal 1 M\+Hz oscillator enabled, so C1, C2, and Q1 can be omitted. Normally, for this experiment, the external circuitry on /\+R\+E\+S\+ET (R1, C3) can be omitted as well, leaving only the A\+VR, the L\+ED, the bypass capacitor C4, and perhaps R2. For the A\+Tmega8/48/88/168, use P\+B1 (pin 15 at the D\+I\+P-\/28 package) to connect the L\+ED to. Additionally, this demo has been ported to many different other A\+V\+Rs. The location of the respective OC pin varies between different A\+V\+Rs, and it is mandated by the A\+VR hardware.
\end{DoxyNote}
\label{group__demo__project_demo_project_schematic}%
\Hypertarget{group__demo__project_demo_project_schematic}%
 
\begin{DoxyImage}
\includegraphics[width=4in]{demo}
\doxyfigcaption{Schematic of circuit for demo project}
\end{DoxyImage}


The source code is given in \mbox{\hyperlink{group__demo__project_demo_project_src}{demo.c}}. For the sake of this example, create a file called {\ttfamily demo.\+c} containing this source code. Some of the more important parts of the code are\+:

\begin{DoxyParagraph}{Note \mbox{[}1\mbox{]}\+:}
As the A\+VR microcontroller series has been developed during the past years, new features have been added over time. Even though the basic concepts of the timer/counter1 are still the same as they used to be back in early 2001 when this simple demo was written initially, the names of registers and bits have been changed slightly to reflect the new features. Also, the port and pin mapping of the output compare match 1A (or 1 for older devices) pin which is used to control the L\+ED varies between different A\+V\+Rs. The file {\ttfamily \mbox{\hyperlink{iocompat_8h_source}{iocompat.\+h}}} tries to abstract between all this differences using some preprocessor {\ttfamily \#ifdef} statements, so the actual program itself can operate on a common set of symbolic names. The macros defined by that file are\+:
\end{DoxyParagraph}

\begin{DoxyItemize}
\item {\ttfamily O\+CR} the name of the O\+CR register used to control the P\+WM (usually either O\+C\+R1 or O\+C\+R1A)
\item {\ttfamily D\+D\+R\+OC} the name of the D\+DR (data direction register) for the OC output
\item {\ttfamily O\+C1} the pin number of the O\+C1\mbox{[}A\mbox{]} output within its port
\item {\ttfamily T\+I\+M\+E\+R1\+\_\+\+T\+OP} the T\+OP value of the timer used for the P\+WM (1023 for 10-\/bit P\+W\+Ms, 255 for devices that can only handle an 8-\/bit P\+WM)
\item {\ttfamily T\+I\+M\+E\+R1\+\_\+\+P\+W\+M\+\_\+\+I\+N\+IT} the initialization bits to be set into control register 1A in order to setup 10-\/bit (or 8-\/bit) phase and frequency correct P\+WM mode
\item {\ttfamily T\+I\+M\+E\+R1\+\_\+\+C\+L\+O\+C\+K\+S\+O\+U\+R\+CE} the clock bits to set in the respective control register to start the P\+WM timer; usually the timer runs at full C\+PU clock for 10-\/bit P\+W\+Ms, while it runs on a prescaled clock for 8-\/bit P\+W\+Ms
\end{DoxyItemize}

\begin{DoxyParagraph}{Note \mbox{[}2\mbox{]}\+:}
\mbox{\hyperlink{group__avr__interrupts_gad28590624d422cdf30d626e0a506255f}{I\+S\+R()}} is a macro that marks the function as an interrupt routine. In this case, the function will get called when timer 1 overflows. Setting up interrupts is explained in greater detail in \mbox{\hyperlink{group__avr__interrupts}{$<$avr/interrupt.\+h$>$\+: Interrupts}}.
\end{DoxyParagraph}
\begin{DoxyParagraph}{Note \mbox{[}3\mbox{]}\+:}
The {\ttfamily P\+WM} is being used in 10-\/bit mode, so we need a 16-\/bit variable to remember the current value.
\end{DoxyParagraph}
\begin{DoxyParagraph}{Note \mbox{[}4\mbox{]}\+:}
This section determines the new value of the {\ttfamily P\+WM}.
\end{DoxyParagraph}
\begin{DoxyParagraph}{Note \mbox{[}5\mbox{]}\+:}
Here\textquotesingle{}s where the newly computed value is loaded into the {\ttfamily P\+WM} register. Since we are in an interrupt routine, it is safe to use a 16-\/bit assignment to the register. Outside of an interrupt, the assignment should only be performed with interrupts disabled if there\textquotesingle{}s a chance that an interrupt routine could also access this register (or another register that uses {\ttfamily T\+E\+MP}), see the appropriate \mbox{\hyperlink{FAQ_faq_16bitio}{F\+AQ entry}}.
\end{DoxyParagraph}
\begin{DoxyParagraph}{Note \mbox{[}6\mbox{]}\+:}
This routine gets called after a reset. It initializes the {\ttfamily P\+WM} and enables interrupts.
\end{DoxyParagraph}
\begin{DoxyParagraph}{Note \mbox{[}7\mbox{]}\+:}
The main loop of the program does nothing -- all the work is done by the interrupt routine! The {\ttfamily \mbox{\hyperlink{group__avr__sleep_ga3775b21f297187752bcfc434a541209a}{sleep\+\_\+mode()}}} puts the processor on sleep until the next interrupt, to conserve power. Of course, that probably won\textquotesingle{}t be noticable as we are still driving a L\+ED, it is merely mentioned here to demonstrate the basic principle.
\end{DoxyParagraph}
\begin{DoxyParagraph}{Note \mbox{[}8\mbox{]}\+:}
Early A\+VR devices saturate their outputs at rather low currents when sourcing current, so the L\+ED can be connected directly, the resulting current through the L\+ED will be about 15 mA. For modern parts (at least for the A\+Tmega 128), however Atmel has drastically increased the IO source capability, so when operating at 5 V Vcc, R2 is needed. Its value should be about 150 Ohms. When operating the circuit at 3 V, it can still be omitted though.
\end{DoxyParagraph}
\hypertarget{group__demo__project_demo_project_src}{}\doxysubsubsection{The Source Code}\label{group__demo__project_demo_project_src}

\begin{DoxyCodeInclude}{0}
\DoxyCodeLine{\textcolor{comment}{/*}}
\DoxyCodeLine{\textcolor{comment}{ * -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/}}
\DoxyCodeLine{\textcolor{comment}{ * "THE BEER-\/WARE LICENSE" (Revision 42):}}
\DoxyCodeLine{\textcolor{comment}{ * <joerg@FreeBSD.ORG> wrote this file.  As long as you retain this notice you}}
\DoxyCodeLine{\textcolor{comment}{ * can do whatever you want with this stuff. If we meet some day, and you think}}
\DoxyCodeLine{\textcolor{comment}{ * this stuff is worth it, you can buy me a beer in return.        Joerg Wunsch}}
\DoxyCodeLine{\textcolor{comment}{ * -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/}}
\DoxyCodeLine{\textcolor{comment}{ *}}
\DoxyCodeLine{\textcolor{comment}{ * Simple AVR demonstration.  Controls a LED that can be directly}}
\DoxyCodeLine{\textcolor{comment}{ * connected from OC1/OC1A to GND.  The brightness of the LED is}}
\DoxyCodeLine{\textcolor{comment}{ * controlled with the PWM.  After each period of the PWM, the PWM}}
\DoxyCodeLine{\textcolor{comment}{ * value is either incremented or decremented, that's all.}}
\DoxyCodeLine{\textcolor{comment}{ *}}
\DoxyCodeLine{\textcolor{comment}{ * \$Id: demo.c 1637 2008-\/03-\/17 21:49:41Z joerg\_wunsch \$}}
\DoxyCodeLine{\textcolor{comment}{ */}}
\DoxyCodeLine{}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{inttypes_8h}{inttypes.h}}>}}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{io_8h}{avr/io.h}}>}}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{interrupt_8h}{avr/interrupt.h}}>}}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{sleep_8h}{avr/sleep.h}}>}}
\DoxyCodeLine{}
\DoxyCodeLine{\textcolor{preprocessor}{\#include "iocompat.h"}       \textcolor{comment}{/* Note [1] */}}
\DoxyCodeLine{}
\DoxyCodeLine{\textcolor{keyword}{enum} \{ UP, DOWN \};}
\DoxyCodeLine{}
\DoxyCodeLine{\mbox{\hyperlink{group__avr__interrupts_gad28590624d422cdf30d626e0a506255f}{ISR}} (TIMER1\_OVF\_vect)        \textcolor{comment}{/* Note [2] */}}
\DoxyCodeLine{\{}
\DoxyCodeLine{    \textcolor{keyword}{static} \mbox{\hyperlink{group__avr__stdint_ga1f1825b69244eb3ad2c7165ddc99c956}{uint16\_t}} pwm;    \textcolor{comment}{/* Note [3] */}}
\DoxyCodeLine{    \textcolor{keyword}{static} \mbox{\hyperlink{group__avr__stdint_gaba7bc1797add20fe3efdf37ced1182c5}{uint8\_t}} direction;}
\DoxyCodeLine{}
\DoxyCodeLine{    \textcolor{keywordflow}{switch} (direction)      \textcolor{comment}{/* Note [4] */}}
\DoxyCodeLine{    \{}
\DoxyCodeLine{        \textcolor{keywordflow}{case} UP:}
\DoxyCodeLine{            \textcolor{keywordflow}{if} (++pwm == TIMER1\_TOP)}
\DoxyCodeLine{                direction = DOWN;}
\DoxyCodeLine{            \textcolor{keywordflow}{break};}
\DoxyCodeLine{}
\DoxyCodeLine{        \textcolor{keywordflow}{case} DOWN:}
\DoxyCodeLine{            \textcolor{keywordflow}{if} (-\/-\/pwm == 0)}
\DoxyCodeLine{                direction = UP;}
\DoxyCodeLine{            \textcolor{keywordflow}{break};}
\DoxyCodeLine{    \}}
\DoxyCodeLine{}
\DoxyCodeLine{    OCR = pwm;          \textcolor{comment}{/* Note [5] */}}
\DoxyCodeLine{\}}
\DoxyCodeLine{}
\DoxyCodeLine{\textcolor{keywordtype}{void}}
\DoxyCodeLine{ioinit (\textcolor{keywordtype}{void})           \textcolor{comment}{/* Note [6] */}}
\DoxyCodeLine{\{}
\DoxyCodeLine{    \textcolor{comment}{/* Timer 1 is 10-\/bit PWM (8-\/bit PWM on some ATtinys). */}}
\DoxyCodeLine{    TCCR1A = TIMER1\_PWM\_INIT;}
\DoxyCodeLine{    \textcolor{comment}{/*}}
\DoxyCodeLine{\textcolor{comment}{     * Start timer 1.}}
\DoxyCodeLine{\textcolor{comment}{     *}}
\DoxyCodeLine{\textcolor{comment}{     * NB: TCCR1A and TCCR1B could actually be the same register, so}}
\DoxyCodeLine{\textcolor{comment}{     * take care to not clobber it.}}
\DoxyCodeLine{\textcolor{comment}{     */}}
\DoxyCodeLine{    TCCR1B |= TIMER1\_CLOCKSOURCE;}
\DoxyCodeLine{    \textcolor{comment}{/*}}
\DoxyCodeLine{\textcolor{comment}{     * Run any device-\/dependent timer 1 setup hook if present.}}
\DoxyCodeLine{\textcolor{comment}{     */}}
\DoxyCodeLine{\textcolor{preprocessor}{\#if defined(TIMER1\_SETUP\_HOOK)}}
\DoxyCodeLine{    TIMER1\_SETUP\_HOOK();}
\DoxyCodeLine{\textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{}
\DoxyCodeLine{    \textcolor{comment}{/* Set PWM value to 0. */}}
\DoxyCodeLine{    OCR = 0;}
\DoxyCodeLine{}
\DoxyCodeLine{    \textcolor{comment}{/* Enable OC1 as output. */}}
\DoxyCodeLine{    DDROC = \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\_BV}} (OC1);}
\DoxyCodeLine{}
\DoxyCodeLine{    \textcolor{comment}{/* Enable timer 1 overflow interrupt. */}}
\DoxyCodeLine{    TIMSK = \mbox{\hyperlink{group__avr__sfr_ga11643f271076024c395a93800b3d9546}{\_BV}} (TOIE1);}
\DoxyCodeLine{    \mbox{\hyperlink{group__avr__interrupts_gaad5ebd34cb344c26ac87594f79b06b73}{sei}} ();}
\DoxyCodeLine{\}}
\DoxyCodeLine{}
\DoxyCodeLine{\textcolor{keywordtype}{int}}
\DoxyCodeLine{main (\textcolor{keywordtype}{void})}
\DoxyCodeLine{\{}
\DoxyCodeLine{}
\DoxyCodeLine{    ioinit ();}
\DoxyCodeLine{}
\DoxyCodeLine{    \textcolor{comment}{/* loop forever, the interrupts are doing the rest */}}
\DoxyCodeLine{}
\DoxyCodeLine{    \textcolor{keywordflow}{for} (;;)            \textcolor{comment}{/* Note [7] */}}
\DoxyCodeLine{        \mbox{\hyperlink{group__avr__sleep_ga3775b21f297187752bcfc434a541209a}{sleep\_mode}}();}
\DoxyCodeLine{}
\DoxyCodeLine{    \textcolor{keywordflow}{return} (0);}
\DoxyCodeLine{\}}
\end{DoxyCodeInclude}
\hypertarget{group__demo__project_demo_project_compile}{}\doxysubsubsection{Compiling and Linking}\label{group__demo__project_demo_project_compile}
This first thing that needs to be done is compile the source. When compiling, the compiler needs to know the processor type so the {\ttfamily -\/mmcu} option is specified. The {\ttfamily -\/Os} option will tell the compiler to optimize the code for efficient space usage (at the possible expense of code execution speed). The {\ttfamily -\/g} is used to embed debug info. The debug info is useful for disassemblies and doesn\textquotesingle{}t end up in the {\ttfamily }.hex files, so I usually specify it. Finally, the {\ttfamily -\/c} tells the compiler to compile and stop -- don\textquotesingle{}t link. This demo is small enough that we could compile and link in one step. However, real-\/world projects will have several modules and will typically need to break up the building of the project into several compiles and one link.

\begin{DoxyVerb}    $ avr-gcc -g -Os -mmcu=atmega8 -c demo.c
\end{DoxyVerb}


The compilation will create a {\ttfamily demo.\+o} file. Next we link it into a binary called {\ttfamily demo.\+elf}.

\begin{DoxyVerb}    $ avr-gcc -g -mmcu=atmega8 -o demo.elf demo.o
\end{DoxyVerb}


It is important to specify the M\+CU type when linking. The compiler uses the {\ttfamily -\/mmcu} option to choose start-\/up files and run-\/time libraries that get linked together. If this option isn\textquotesingle{}t specified, the compiler defaults to the 8515 processor environment, which is most certainly what you didn\textquotesingle{}t want.\hypertarget{group__demo__project_demo_project_obj}{}\doxysubsubsection{Examining the Object File}\label{group__demo__project_demo_project_obj}
\index{disassembling@{disassembling}}

Now we have a binary file. Can we do anything useful with it (besides put it into the processor?) The G\+NU Binutils suite is made up of many useful tools for manipulating object files that get generated. One tool is {\ttfamily avr-\/objdump}, which takes information from the object file and displays it in many useful ways. Typing the command by itself will cause it to list out its options.

For instance, to get a feel of the application\textquotesingle{}s size, the {\ttfamily -\/h} option can be used. The output of this option shows how much space is used in each of the sections (the {\ttfamily }.stab and {\ttfamily }.stabstr sections hold the debugging information and won\textquotesingle{}t make it into the R\+OM file).

An even more useful option is {\ttfamily -\/S}. This option disassembles the binary file and intersperses the source code in the output! This method is much better, in my opinion, than using the {\ttfamily -\/S} with the compiler because this listing includes routines from the libraries and the vector table contents. Also, all the \char`\"{}fix-\/ups\char`\"{} have been satisfied. In other words, the listing generated by this option reflects the actual code that the processor will run.

\begin{DoxyVerb}    $ avr-objdump -h -S demo.elf > demo.lst
\end{DoxyVerb}


Here\textquotesingle{}s the output as saved in the {\ttfamily demo.\+lst} file\+:


\begin{DoxyVerbInclude}

demo.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         00000110  00000000  00000000  00000094  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         00000000  00800060  00000110  000001a4  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  2 .bss          00000003  00800060  00800060  000001a4  2**0
                  ALLOC
  3 .stab         00000744  00000000  00000000  000001a4  2**2
                  CONTENTS, READONLY, DEBUGGING
  4 .stabstr      00000d23  00000000  00000000  000008e8  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .comment      00000011  00000000  00000000  0000160b  2**0
                  CONTENTS, READONLY
  6 .note.gnu.avr.deviceinfo 00000034  00000000  00000000  0000161c  2**2
                  CONTENTS, READONLY
  7 .debug_info   0000048c  00000000  00000000  00001650  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_abbrev 0000044e  00000000  00000000  00001adc  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_line   0000001d  00000000  00000000  00001f2a  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_str    0000017a  00000000  00000000  00001f47  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

00000000 <__vectors>:
   0:	12 c0       	rjmp	.+36     	; 0x26 <__ctors_end>
   2:	6d c0       	rjmp	.+218    	; 0xde <__bad_interrupt>
   4:	6c c0       	rjmp	.+216    	; 0xde <__bad_interrupt>
   6:	6b c0       	rjmp	.+214    	; 0xde <__bad_interrupt>
   8:	6a c0       	rjmp	.+212    	; 0xde <__bad_interrupt>
   a:	69 c0       	rjmp	.+210    	; 0xde <__bad_interrupt>
   c:	68 c0       	rjmp	.+208    	; 0xde <__bad_interrupt>
   e:	67 c0       	rjmp	.+206    	; 0xde <__bad_interrupt>
  10:	1a c0       	rjmp	.+52     	; 0x46 <__vector_8>
  12:	65 c0       	rjmp	.+202    	; 0xde <__bad_interrupt>
  14:	64 c0       	rjmp	.+200    	; 0xde <__bad_interrupt>
  16:	63 c0       	rjmp	.+198    	; 0xde <__bad_interrupt>
  18:	62 c0       	rjmp	.+196    	; 0xde <__bad_interrupt>
  1a:	61 c0       	rjmp	.+194    	; 0xde <__bad_interrupt>
  1c:	60 c0       	rjmp	.+192    	; 0xde <__bad_interrupt>
  1e:	5f c0       	rjmp	.+190    	; 0xde <__bad_interrupt>
  20:	5e c0       	rjmp	.+188    	; 0xde <__bad_interrupt>
  22:	5d c0       	rjmp	.+186    	; 0xde <__bad_interrupt>
  24:	5c c0       	rjmp	.+184    	; 0xde <__bad_interrupt>

00000026 <__ctors_end>:
  26:	11 24       	eor	r1, r1
  28:	1f be       	out	0x3f, r1	; 63
  2a:	cf e5       	ldi	r28, 0x5F	; 95
  2c:	d4 e0       	ldi	r29, 0x04	; 4
  2e:	de bf       	out	0x3e, r29	; 62
  30:	cd bf       	out	0x3d, r28	; 61

00000032 <__do_clear_bss>:
  32:	10 e0       	ldi	r17, 0x00	; 0
  34:	a0 e6       	ldi	r26, 0x60	; 96
  36:	b0 e0       	ldi	r27, 0x00	; 0
  38:	01 c0       	rjmp	.+2      	; 0x3c <.do_clear_bss_start>

0000003a <.do_clear_bss_loop>:
  3a:	1d 92       	st	X+, r1

0000003c <.do_clear_bss_start>:
  3c:	a3 36       	cpi	r26, 0x63	; 99
  3e:	b1 07       	cpc	r27, r17
  40:	e1 f7       	brne	.-8      	; 0x3a <.do_clear_bss_loop>
  42:	4e d0       	rcall	.+156    	; 0xe0 <main>
  44:	61 c0       	rjmp	.+194    	; 0x108 <exit>

00000046 <__vector_8>:
#include "iocompat.h"		/* Note [1] */

enum { UP, DOWN };

ISR (TIMER1_OVF_vect)		/* Note [2] */
{
  46:	1f 92       	push	r1
  48:	0f 92       	push	r0
  4a:	0f b6       	in	r0, 0x3f	; 63
  4c:	0f 92       	push	r0
  4e:	11 24       	eor	r1, r1
  50:	2f 93       	push	r18
  52:	8f 93       	push	r24
  54:	9f 93       	push	r25
    static uint16_t pwm;	/* Note [3] */
    static uint8_t direction;

    switch (direction)		/* Note [4] */
  56:	80 91 62 00 	lds	r24, 0x0062	; 0x800062 <direction.1475>
  5a:	88 23       	and	r24, r24
  5c:	01 f1       	breq	.+64     	; 0x9e <__vector_8+0x58>
  5e:	81 30       	cpi	r24, 0x01	; 1
  60:	81 f4       	brne	.+32     	; 0x82 <__vector_8+0x3c>
            if (++pwm == TIMER1_TOP)
                direction = DOWN;
            break;

        case DOWN:
            if (--pwm == 0)
  62:	80 91 60 00 	lds	r24, 0x0060	; 0x800060 <_edata>
  66:	90 91 61 00 	lds	r25, 0x0061	; 0x800061 <_edata+0x1>
  6a:	01 97       	sbiw	r24, 0x01	; 1
  6c:	90 93 61 00 	sts	0x0061, r25	; 0x800061 <_edata+0x1>
  70:	80 93 60 00 	sts	0x0060, r24	; 0x800060 <_edata>
  74:	00 97       	sbiw	r24, 0x00	; 0
  76:	49 f4       	brne	.+18     	; 0x8a <__vector_8+0x44>
                direction = UP;
  78:	10 92 62 00 	sts	0x0062, r1	; 0x800062 <direction.1475>
  7c:	80 e0       	ldi	r24, 0x00	; 0
  7e:	90 e0       	ldi	r25, 0x00	; 0
  80:	04 c0       	rjmp	.+8      	; 0x8a <__vector_8+0x44>
  82:	80 91 60 00 	lds	r24, 0x0060	; 0x800060 <_edata>
  86:	90 91 61 00 	lds	r25, 0x0061	; 0x800061 <_edata+0x1>
            break;
    }

    OCR = pwm;			/* Note [5] */
  8a:	9b bd       	out	0x2b, r25	; 43
  8c:	8a bd       	out	0x2a, r24	; 42
}
  8e:	9f 91       	pop	r25
  90:	8f 91       	pop	r24
  92:	2f 91       	pop	r18
  94:	0f 90       	pop	r0
  96:	0f be       	out	0x3f, r0	; 63
  98:	0f 90       	pop	r0
  9a:	1f 90       	pop	r1
  9c:	18 95       	reti
            if (++pwm == TIMER1_TOP)
  9e:	80 91 60 00 	lds	r24, 0x0060	; 0x800060 <_edata>
  a2:	90 91 61 00 	lds	r25, 0x0061	; 0x800061 <_edata+0x1>
  a6:	01 96       	adiw	r24, 0x01	; 1
  a8:	90 93 61 00 	sts	0x0061, r25	; 0x800061 <_edata+0x1>
  ac:	80 93 60 00 	sts	0x0060, r24	; 0x800060 <_edata>
  b0:	8f 3f       	cpi	r24, 0xFF	; 255
  b2:	23 e0       	ldi	r18, 0x03	; 3
  b4:	92 07       	cpc	r25, r18
  b6:	49 f7       	brne	.-46     	; 0x8a <__vector_8+0x44>
                direction = DOWN;
  b8:	81 e0       	ldi	r24, 0x01	; 1
  ba:	80 93 62 00 	sts	0x0062, r24	; 0x800062 <direction.1475>
  be:	8f ef       	ldi	r24, 0xFF	; 255
  c0:	93 e0       	ldi	r25, 0x03	; 3
  c2:	e3 cf       	rjmp	.-58     	; 0x8a <__vector_8+0x44>

000000c4 <ioinit>:

void
ioinit (void)			/* Note [6] */
{
    /* Timer 1 is 10-bit PWM (8-bit PWM on some ATtinys). */
    TCCR1A = TIMER1_PWM_INIT;
  c4:	83 e8       	ldi	r24, 0x83	; 131
  c6:	8f bd       	out	0x2f, r24	; 47
     * Start timer 1.
     *
     * NB: TCCR1A and TCCR1B could actually be the same register, so
     * take care to not clobber it.
     */
    TCCR1B |= TIMER1_CLOCKSOURCE;
  c8:	8e b5       	in	r24, 0x2e	; 46
  ca:	81 60       	ori	r24, 0x01	; 1
  cc:	8e bd       	out	0x2e, r24	; 46
#if defined(TIMER1_SETUP_HOOK)
    TIMER1_SETUP_HOOK();
#endif

    /* Set PWM value to 0. */
    OCR = 0;
  ce:	1b bc       	out	0x2b, r1	; 43
  d0:	1a bc       	out	0x2a, r1	; 42

    /* Enable OC1 as output. */
    DDROC = _BV (OC1);
  d2:	82 e0       	ldi	r24, 0x02	; 2
  d4:	87 bb       	out	0x17, r24	; 23

    /* Enable timer 1 overflow interrupt. */
    TIMSK = _BV (TOIE1);
  d6:	84 e0       	ldi	r24, 0x04	; 4
  d8:	89 bf       	out	0x39, r24	; 57
    sei ();
  da:	78 94       	sei
  dc:	08 95       	ret

000000de <__bad_interrupt>:
  de:	90 cf       	rjmp	.-224    	; 0x0 <__vectors>

000000e0 <main>:
    TCCR1A = TIMER1_PWM_INIT;
  e0:	83 e8       	ldi	r24, 0x83	; 131
  e2:	8f bd       	out	0x2f, r24	; 47
    TCCR1B |= TIMER1_CLOCKSOURCE;
  e4:	8e b5       	in	r24, 0x2e	; 46
  e6:	81 60       	ori	r24, 0x01	; 1
  e8:	8e bd       	out	0x2e, r24	; 46
    OCR = 0;
  ea:	1b bc       	out	0x2b, r1	; 43
  ec:	1a bc       	out	0x2a, r1	; 42
    DDROC = _BV (OC1);
  ee:	82 e0       	ldi	r24, 0x02	; 2
  f0:	87 bb       	out	0x17, r24	; 23
    TIMSK = _BV (TOIE1);
  f2:	84 e0       	ldi	r24, 0x04	; 4
  f4:	89 bf       	out	0x39, r24	; 57
    sei ();
  f6:	78 94       	sei
    ioinit ();

    /* loop forever, the interrupts are doing the rest */

    for (;;)			/* Note [7] */
        sleep_mode();
  f8:	85 b7       	in	r24, 0x35	; 53
  fa:	80 68       	ori	r24, 0x80	; 128
  fc:	85 bf       	out	0x35, r24	; 53
  fe:	88 95       	sleep
 100:	85 b7       	in	r24, 0x35	; 53
 102:	8f 77       	andi	r24, 0x7F	; 127
 104:	85 bf       	out	0x35, r24	; 53
 106:	f8 cf       	rjmp	.-16     	; 0xf8 <main+0x18>

00000108 <exit>:
 108:	f8 94       	cli
 10a:	00 c0       	rjmp	.+0      	; 0x10c <_exit>

0000010c <_exit>:
 10c:	f8 94       	cli

0000010e <__stop_program>:
 10e:	ff cf       	rjmp	.-2      	; 0x10e <__stop_program>
\end{DoxyVerbInclude}
\hypertarget{group__demo__project_demo_project_map}{}\doxysubsubsection{Linker Map Files}\label{group__demo__project_demo_project_map}
{\ttfamily avr-\/objdump} is very useful, but sometimes it\textquotesingle{}s necessary to see information about the link that can only be generated by the linker. A map file contains this information. A map file is useful for monitoring the sizes of your code and data. It also shows where modules are loaded and which modules were loaded from libraries. It is yet another view of your application. To get a map file, I usually add {\ttfamily {\bfseries{-\/Wl,-\/Map,demo.\+map}}} to my link command. Relink the application using the following command to generate {\ttfamily demo.\+map} (a portion of which is shown below).

\begin{DoxyVerb}    $ avr-gcc -g -mmcu=atmega8 -Wl,-Map,demo.map -o demo.elf demo.o
\end{DoxyVerb}




Some points of interest in the {\ttfamily demo.\+map} file are\+:


\begin{DoxyCodeInclude}{0}
\DoxyCodeLine{.rela.plt}
\DoxyCodeLine{ *(.rela.plt)}
\DoxyCodeLine{}
\DoxyCodeLine{.text           0x00000000      0x110}
\DoxyCodeLine{ *(.vectors)}
\DoxyCodeLine{ .vectors       0x00000000       0x26 /tmp/pkgbuild/cross/avr-\/libc/work.earmv6hf/avr-\/libc-\/2.0.0/avr/lib/avr4/atmega8/crtm8.o}
\DoxyCodeLine{                0x00000000                \_\_vectors}
\DoxyCodeLine{                0x00000000                \_\_vector\_default}
\DoxyCodeLine{ *(.vectors)}
\DoxyCodeLine{ *(.progmem.gcc*)}
\DoxyCodeLine{                0x00000026                . = ALIGN (0x2)}
\DoxyCodeLine{                0x00000026                \_\_trampolines\_start = .}
\DoxyCodeLine{ *(.trampolines)}
\DoxyCodeLine{ .trampolines   0x00000026        0x0 linker stubs}
\DoxyCodeLine{ *(.trampolines*)}
\DoxyCodeLine{                0x00000026                \_\_trampolines\_end = .}
\DoxyCodeLine{ *libprintf\_flt.a:*(.progmem.data)}
\DoxyCodeLine{ *libc.a:*(.progmem.data)}
\DoxyCodeLine{ *(.progmem.*)}
\DoxyCodeLine{                0x00000026                . = ALIGN (0x2)}
\DoxyCodeLine{ *(.lowtext)}
\DoxyCodeLine{ *(.lowtext*)}
\DoxyCodeLine{                0x00000026                \_\_ctors\_start = .}

\end{DoxyCodeInclude}


The {\ttfamily }.text segment (where program instructions are stored) starts at location 0x0.


\begin{DoxyCodeInclude}{0}
\DoxyCodeLine{ *(.fini2)}
\DoxyCodeLine{ *(.fini2)}
\DoxyCodeLine{ *(.fini1)}
\DoxyCodeLine{ *(.fini1)}
\DoxyCodeLine{ *(.fini0)}
\DoxyCodeLine{ .fini0         0x0000010c        0x4 /usr/pkg/lib/gcc/avr/4.8.3/avr4/libgcc.a(\_exit.o)}
\DoxyCodeLine{ *(.fini0)}
\DoxyCodeLine{ *(.hightext)}
\DoxyCodeLine{ *(.hightext*)}
\DoxyCodeLine{ *(.progmemx.*)}
\DoxyCodeLine{                0x00000110                . = ALIGN (0x2)}
\DoxyCodeLine{ *(.jumptables)}
\DoxyCodeLine{ *(.jumptables*)}
\DoxyCodeLine{                0x00000110                \_etext = .}
\DoxyCodeLine{}
\DoxyCodeLine{.data           0x00800060        0x0 load address 0x00000110}
\DoxyCodeLine{                [!provide]                PROVIDE (\_\_data\_start = .)}
\DoxyCodeLine{ *(.data)}
\DoxyCodeLine{ .data          0x00800060        0x0 demo.o}
\DoxyCodeLine{ .data          0x00800060        0x0 /tmp/pkgbuild/cross/avr-\/libc/work.earmv6hf/avr-\/libc-\/2.0.0/avr/lib/avr4/atmega8/crtm8.o}
\DoxyCodeLine{ .data          0x00800060        0x0 /tmp/pkgbuild/cross/avr-\/libc/work.earmv6hf/avr-\/libc-\/2.0.0/avr/lib/avr4/exit.o}
\DoxyCodeLine{ .data          0x00800060        0x0 /usr/pkg/lib/gcc/avr/4.8.3/avr4/libgcc.a(\_exit.o)}
\DoxyCodeLine{ .data          0x00800060        0x0 /usr/pkg/lib/gcc/avr/4.8.3/avr4/libgcc.a(\_clear\_bss.o)}
\DoxyCodeLine{ *(.data*)}
\DoxyCodeLine{ *(.gnu.linkonce.d*)}
\DoxyCodeLine{ *(.rodata)}
\DoxyCodeLine{ *(.rodata*)}
\DoxyCodeLine{ *(.gnu.linkonce.r*)}
\DoxyCodeLine{                0x00800060                . = ALIGN (0x2)}
\DoxyCodeLine{                0x00800060                \_edata = .}
\DoxyCodeLine{                [!provide]                PROVIDE (\_\_data\_end = .)}
\DoxyCodeLine{}
\DoxyCodeLine{.bss            0x00800060        0x3}
\DoxyCodeLine{                0x00800060                PROVIDE (\_\_bss\_start = .)}
\DoxyCodeLine{ *(.bss)}
\DoxyCodeLine{ .bss           0x00800060        0x3 demo.o}
\DoxyCodeLine{ .bss           0x00800063        0x0 /tmp/pkgbuild/cross/avr-\/libc/work.earmv6hf/avr-\/libc-\/2.0.0/avr/lib/avr4/atmega8/crtm8.o}
\DoxyCodeLine{ .bss           0x00800063        0x0 /tmp/pkgbuild/cross/avr-\/libc/work.earmv6hf/avr-\/libc-\/2.0.0/avr/lib/avr4/exit.o}
\DoxyCodeLine{ .bss           0x00800063        0x0 /usr/pkg/lib/gcc/avr/4.8.3/avr4/libgcc.a(\_exit.o)}
\DoxyCodeLine{ .bss           0x00800063        0x0 /usr/pkg/lib/gcc/avr/4.8.3/avr4/libgcc.a(\_clear\_bss.o)}
\DoxyCodeLine{ *(.bss*)}
\DoxyCodeLine{ *(COMMON)}
\DoxyCodeLine{                0x00800063                PROVIDE (\_\_bss\_end = .)}
\DoxyCodeLine{                0x00000110                \_\_data\_load\_start = LOADADDR (.data)}
\DoxyCodeLine{                0x00000110                \_\_data\_load\_end = (\_\_data\_load\_start + SIZEOF (.data))}
\DoxyCodeLine{}
\DoxyCodeLine{.noinit         0x00800063        0x0}
\DoxyCodeLine{                [!provide]                PROVIDE (\_\_noinit\_start = .)}
\DoxyCodeLine{ *(.noinit*)}
\DoxyCodeLine{                [!provide]                PROVIDE (\_\_noinit\_end = .)}
\DoxyCodeLine{                0x00800063                \_end = .}
\DoxyCodeLine{                [!provide]                PROVIDE (\_\_heap\_start = .)}
\DoxyCodeLine{}
\DoxyCodeLine{.eeprom         0x00810000        0x0}
\DoxyCodeLine{ *(.eeprom*)}
\DoxyCodeLine{                0x00810000                \_\_eeprom\_end = .}

\end{DoxyCodeInclude}


The last address in the {\ttfamily }.text segment is location {\ttfamily 0x114} ( denoted by {\ttfamily \+\_\+etext} ), so the instructions use up 276 bytes of F\+L\+A\+SH.

The {\ttfamily }.data segment (where initialized static variables are stored) starts at location {\ttfamily 0x60}, which is the first address after the register bank on an A\+Tmega8 processor.

The next available address in the {\ttfamily }.data segment is also location {\ttfamily 0x60}, so the application has no initialized data.

The {\ttfamily }.bss segment (where uninitialized data is stored) starts at location {\ttfamily 0x60}.

The next available address in the {\ttfamily }.bss segment is location 0x63, so the application uses 3 bytes of uninitialized data.

The {\ttfamily }.eeprom segment (where E\+E\+P\+R\+OM variables are stored) starts at location 0x0.

The next available address in the {\ttfamily }.eeprom segment is also location 0x0, so there aren\textquotesingle{}t any E\+E\+P\+R\+OM variables.\hypertarget{group__demo__project_demo_ihex}{}\doxysubsubsection{Generating Intel Hex Files}\label{group__demo__project_demo_ihex}
We have a binary of the application, but how do we get it into the processor? Most (if not all) programmers will not accept a G\+NU executable as an input file, so we need to do a little more processing. The next step is to extract portions of the binary and save the information into {\ttfamily }.hex files. The G\+NU utility that does this is called {\ttfamily avr-\/objcopy}.

The R\+OM contents can be pulled from our project\textquotesingle{}s binary and put into the file demo.\+hex using the following command\+:

\begin{DoxyVerb}    $ avr-objcopy -j .text -j .data -O ihex demo.elf demo.hex
\end{DoxyVerb}


The resulting {\ttfamily demo.\+hex} file contains\+:


\begin{DoxyVerbInclude}
:1000000012C06DC06CC06BC06AC069C068C067C0F8
:100010001AC065C064C063C062C061C060C05FC018
:100020005EC05DC05CC011241FBECFE5D4E0DEBF62
:10003000CDBF10E0A0E6B0E001C01D92A336B1072D
:10004000E1F74ED061C01F920F920FB60F921124AC
:100050002F938F939F9380916200882301F18130C9
:1000600081F480916000909161000197909361000C
:1000700080936000009749F41092620080E090E065
:1000800004C080916000909161009BBD8ABD9F91EA
:100090008F912F910F900FBE0F901F901895809108
:1000A00060009091610001969093610080936000E0
:1000B0008F3F23E0920749F781E0809362008FEF42
:1000C00093E0E3CF83E88FBD8EB581608EBD1BBC0E
:1000D0001ABC82E087BB84E089BF7894089590CFF2
:1000E00083E88FBD8EB581608EBD1BBC1ABC82E0DB
:1000F00087BB84E089BF789485B7806885BF889581
:1001000085B78F7785BFF8CFF89400C0F894FFCFFC
:00000001FF
\end{DoxyVerbInclude}


The {\ttfamily -\/j} option indicates that we want the information from the {\ttfamily }.text and {\ttfamily }.data segment extracted. If we specify the E\+E\+P\+R\+OM segment, we can generate a {\ttfamily }.hex file that can be used to program the E\+E\+P\+R\+OM\+:

\begin{DoxyVerb}    $ avr-objcopy -j .eeprom --change-section-lma .eeprom=0 -O ihex demo.elf demo_eeprom.hex
\end{DoxyVerb}


There is no {\ttfamily demo\+\_\+eeprom.\+hex} file written, as that file would be empty.

Starting with version 2.\+17 of the G\+NU binutils, the {\ttfamily avr-\/objcopy} command that used to generate the empty E\+E\+P\+R\+OM files now aborts because of the empty input section {\ttfamily }.eeprom, so these empty files are not generated. It also signals an error to the Makefile which will be caught there, and makes it print a message about the empty file not being generated.\hypertarget{group__demo__project_demo_make}{}\doxysubsubsection{Letting Make Build the Project}\label{group__demo__project_demo_make}
Rather than type these commands over and over, they can all be placed in a make file. To build the demo project using {\ttfamily make}, save the following in a file called {\ttfamily Makefile}.

\begin{DoxyNote}{Note}
This {\ttfamily Makefile} can only be used as input for the G\+NU version of {\ttfamily make}.
\end{DoxyNote}

\begin{DoxyCodeInclude}{0}
\end{DoxyCodeInclude}
\hypertarget{group__demo__project_demo_sourceref}{}\doxysubsubsection{Reference to the source code}\label{group__demo__project_demo_sourceref}


 
The source code is installed under

\texttt{\$prefix/share/doc/avr-libc/examples/demo/},

where \texttt{\$prefix} is a configuration option.  For Unix
systems, it is usually set to either \texttt{/usr} or
\texttt{/usr/local}.
 