\hypertarget{group__avr__cpufunc}{}\doxysubsection{$<$avr/cpufunc.h$>$\+: Special A\+VR C\+PU functions}
\label{group__avr__cpufunc}\index{$<$avr/cpufunc.h$>$: Special AVR CPU functions@{$<$avr/cpufunc.h$>$: Special AVR CPU functions}}
\doxysubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group__avr__cpufunc_ga46388d9db8422abfea56ae2323f7a77c}{\+\_\+\+N\+OP}}()
\item 
\#define \mbox{\hyperlink{group__avr__cpufunc_ga1060ab52075a71b61c88636e204321b2}{\+\_\+\+Memory\+Barrier}}()
\end{DoxyCompactItemize}


\doxysubsubsection{Detailed Description}

\begin{DoxyCode}{0}
\DoxyCodeLine{\textcolor{preprocessor}{\#include <\mbox{\hyperlink{cpufunc_8h}{avr/cpufunc.h}}>} }
\end{DoxyCode}


This header file contains macros that access special functions of the A\+VR C\+PU which do not fit into any of the other header files. 

\doxysubsubsection{Macro Definition Documentation}
\mbox{\Hypertarget{group__avr__cpufunc_ga1060ab52075a71b61c88636e204321b2}\label{group__avr__cpufunc_ga1060ab52075a71b61c88636e204321b2}} 
\index{$<$avr/cpufunc.h$>$: Special AVR CPU functions@{$<$avr/cpufunc.h$>$: Special AVR CPU functions}!\_MemoryBarrier@{\_MemoryBarrier}}
\index{\_MemoryBarrier@{\_MemoryBarrier}!$<$avr/cpufunc.h$>$: Special AVR CPU functions@{$<$avr/cpufunc.h$>$: Special AVR CPU functions}}
\doxyparagraph{\texorpdfstring{\_MemoryBarrier}{\_MemoryBarrier}}
{\footnotesize\ttfamily \#define \+\_\+\+Memory\+Barrier(\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})}

Implement a read/write {\itshape memory barrier}. A memory barrier instructs the compiler to not cache any memory data in registers beyond the barrier. This can sometimes be more effective than blocking certain optimizations by declaring some object with a {\ttfamily volatile} qualifier.

See \mbox{\hyperlink{optimization_optim_code_reorder}{Problems with reordering code}} for things to be taken into account with respect to compiler optimizations. \mbox{\Hypertarget{group__avr__cpufunc_ga46388d9db8422abfea56ae2323f7a77c}\label{group__avr__cpufunc_ga46388d9db8422abfea56ae2323f7a77c}} 
\index{$<$avr/cpufunc.h$>$: Special AVR CPU functions@{$<$avr/cpufunc.h$>$: Special AVR CPU functions}!\_NOP@{\_NOP}}
\index{\_NOP@{\_NOP}!$<$avr/cpufunc.h$>$: Special AVR CPU functions@{$<$avr/cpufunc.h$>$: Special AVR CPU functions}}
\doxyparagraph{\texorpdfstring{\_NOP}{\_NOP}}
{\footnotesize\ttfamily \#define \+\_\+\+N\+OP(\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})}

Execute a {\itshape no operation} (N\+OP) C\+PU instruction. This should not be used to implement delays, better use the functions from $<$\mbox{\hyperlink{delay__basic_8h}{util/delay\+\_\+basic.\+h}}$>$ or $<$\mbox{\hyperlink{delay_8h}{util/delay.\+h}}$>$ for this. For debugging purposes, a N\+OP can be useful to have an instruction that is guaranteed to be not optimized away by the compiler, so it can always become a breakpoint in the debugger. 